No higher resolution available.
NOR_gate_layout.png (600 × 433 pixels, file size: 22 KB, MIME type: image/png)
 | This is a file from the Wikimedia Commons. Information from its description page there is shown below. Commons is a freely licensed media file repository. You can help. |
Summary
| Description |
Shows a CMOS implementation of a NOR gate. Also used at http://www.sccs.swarthmore.edu/users/06/adem/engin/e77vlsi/lab3/ |
| Date | 20 November 2009 (original upload date) |
| Source | No machine-readable source provided. Own work assumed (based on copyright claims). |
| Author | No machine-readable author provided. Miquel puig assumed (based on copyright claims). |
Licensing
|
I, the copyright holder of this work, release this work into the public domain. This applies worldwide. In some countries this may not be legally possible; if so: I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law. |
File history
Click on a date/time to view the file as it appeared at that time.
| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 12:41, 20 November 2009 | | 600 × 433 (22 KB) | Miquel puig | == Summary == Shows a CMOS implementation of a NOR gate. Also used at http://www.sccs.swarthmore.edu/users/06/adem/engin/e77vlsi/lab3/ == Licensing == {{PD-self|date=November 2007}} Category:Logic Category:Logic gates |
File usage
The following page uses this file:
Global file usage
The following other wikis use this file:
- Usage on ar.wikipedia.org
- Usage on ca.wikipedia.org
- Usage on es.wikipedia.org
- Usage on ja.wikipedia.org
- Usage on ko.wikipedia.org
- Usage on zh.wikipedia.org
